NEW PUBLICATION

Low-Power FPGA SNNs for Real-Time Neural Decoding

This work presents a real-time neural decoding system based on spiking neural networks (SNNs), implemented on a low-power Lattice iCE40UP5k FPGA. The system decodes hand motion variables from iEEG signals recorded via a 96-channel MEA. Evaluations on two public datasets show performance comparable to deep learning models, with only 13.9 mW average power and 13.9 µJ per inference, enabling efficient brain–machine interface solutions.